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The Hogel processing unit (HPU) is a highly parallel homogeneous computation device dedicated to rendering hogels for a holographic light-field display and encompasses the 3D scene conversion into hogels, the 2D post processing filters on hogels for spatial and color corrections and framebuffer management tasks. Hogels are similar to a sub-aperture image in a plenoptic radiance image, in that a hogel represents both the direction and intensity of light within a frustum from a given point on the light-field display plane. The resulting projected light-field is full parallax, allowing the viewer a perspective correct visualization within the light-field display view volume.
The HPU is separated from the host CPU (or GPU) by an expandable, interconnect framework and provides many views (hogels) into a scene per scene frame. The HPU is physically located in close proximity to the photonic modulation layer of a light-field display and has direct write access to the modulation driver back-buffers. This reduces the complexity of an HPU interconnect framework and allows the HPU processing pipeline to be as short and efficient as possible.
Synthetic light-field rays are typically rendered as part of a hogel (2D array of rays/RGB pixels) using double-frustum rasterization or ray-tracing/ray-casting algorithms. These hogel rendering algorithms are greatly accelerated by the use of off-the-shelf (OTS) GPUs, however, there exists a substantial gap between real-time light-field rendering needs in terms of frame-rate, power and form factor requirements and modern GPU capability.
The computed hogel light-field display requires as input a streaming 3D scene and a modeled/virtual display plane for visualization. The light-field display plane is a 2D array of microlens; hogels are computed at the center of every lens from the perspective of a virtual display plane in model space. 3D operations such as pan, scale, zoom, tilt and rotate are accomplished by transforming the virtual display plane through model space. For every light-field display update, every hogel must be updated or rendered. Therefore, if a light-field display had an array of 600 × 600 hogels, then the HPUs would have to compute 360,000 hogels per update. If each hogel had a directional/angular resolution of 512x512 rays/pixels, then the HPU array would be generating 94,371,840,000 pixels (283,115,520,00 bytes) per update. At 30 display updates per second (DPS), this equates to 2,831,155,200,000 unique pixels every second for dynamic scenes.
HPU parallelism Since many (possibly hundreds) HPUs would be required to drive a single light-field display, it is important that the HPU be an independent processor, requiring minimal support logic and interconnect. The HPU interconnect framework should provide scene, command and sync buffering and relay throughout the topology. Ideally, neither the host system nor the individual HPUs would have knowledge of the interconnect topology or even the depth and breadth of the system.
Hogel parallelism (multivew point rendering) A critical component of the HPU is the rendering of multiple viewpoints (hogels) in parallel per rendering pass of the geometry to take advantage of vertex and texture cache coherency.
- Klug, M., Burnett, T., Fancello, A., Heath, A., Gardner, K., O'Connell, S., Newswanger, C. (2013). "A Scalable, Collaborative, Interactive Light-field Display System", SID Symposium Digest of Technical Papers
- Lucente, Mark. "Diffraction-Specific Fringe Computation for Electro-Holography". MIT Dept. of Electrical Engineering and Computer Science. Retrieved Sep 1994. Check date values in:
|accessdate=(help) See, for example, page 55 in "Chapter 4: Diffraction-Specific Computation", or the "Glossary of Terms and Abbreviations" in Appendix A on page 151.