Altera headquarters in San Jose, California.
|Fate||Acquired by Intel|
|Defunct||December 28, 2015|
|Headquarters||San Jose, California, United States|
|John P. Daane (Chairman, President, & CEO)|
Ronald J. Pasek (CFO)
|Revenue||$1.932 billion (2014)|
|$472 million (2014)|
|Total assets||$5.674 billion (2014)|
|Total equity||$3.285 billion (2014)|
Number of employees
|Footnotes / references|
The main product lines from Altera were the Stratix, mid-range Arria, and lower-cost Cyclone series system on a chip FPGAs, the MAX series complex programmable logic device and non-volatile FPGAs, Intel Quartus Prime design software, and Enpirion PowerSoC DC-DC power solutions.
The company was founded in 1983 by semiconductor veterans Rodney Smith, Robert Hartmann, James Sansbury, and Paul Newhagen with $500,000 in seed money. The name of the company was a play on "alterable", the type of chips the company created. In 1984, the company formed a long-running design partnership with Intel. In 1988, the company became a public company via an initial public offering. In 1994, Altera acquired the PLD business of Intel for $50 million.
By the 1990s, the company was the primary competitor of Xilinx.
The Stratix series FPGAs were the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal-processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz.
In September 2000, the company acquired Northwest Logic to expand its design services for delivery of complete system-on-chip solutions.
In May 2013, Altera made available SDK for OpenCL, enabling software programmers to access the high-performance capabilities of programmable logic devices.
System on a chip FPGAs
Beginning in December 2012, the company produced system on a chip FPGA devices using a fully depleted silicon on insulator (FDSOI) chip manufacturing process. These devices integrated FPGAs with full hard processor systems based around ARM architecture onto a single device.
In May 2013, Altera acquired embedded power chipmaker Enpirion for approximately $140 million in cash, providing Altera with power system on a chip DC-DC converters that enabled greater power densities and lower noise performance compared with their discrete equivalent. Unlike converters made from discrete components, Enpirion DC-DC converters were simulated, characterized, validated and production qualified at delivery.
Application-specific integrated circuits (ASICs)
Altera offered a publicly available ASIC design flow based on HardCopy ASICs, which transitioned an FPGA design, once finalized, to a form which is not alterable. This design flow reduced design security risks as well as costs for higher volume production. Design engineers could prototype their designs in Stratix series FPGAs, and then migrate these designs to HardCopy ASICs when they were ready for volume production.
The unique design flow made hardware/software co-design and co-verification possible. The flow was benchmarked to deliver systems to market 9 to 12 months faster, on average, than with standard-cell solutions. Design engineers were able to employ a single RTL, set of intellectual property (IP) cores, and Quartus II design software for both FPGA and ASIC implementations. Altera's HardCopy Design Center managed test insertion.
In 2007, Altera’s Nios II FPGA soft processor core became available for standard cell ASIC designs.
Semiconductor intellectual property cores
Altera and its partners offered an array of semiconductor intellectual property cores that served as building blocks that design engineers can drop into their system designs to perform specific functions. IP cores eliminate some of the time-consuming tasks of creating every block in a design from scratch. In 2000, Altera acquired Designpro, a provider of IP cores.
Altera offered soft processor cores on the Nios II embedded processor, the Freescale ColdFire v1 core (free for Cyclone III FPGA), and the ARM Cortex-M1 processor as well as a hard IP processor core on the ARM Cortex-A9 processor.
All of Altera's devices were supported by a common design environment, Quartus II design software. Quartus II software was available in a subscription-based edition and a free Web-based edition. It included tools to foster productivity.
In February 2009, the company introduced Stratix IV GT FPGAs, which had 11.3 Gbit/s transceivers for 40G/100G applications, and Arria II GX FPGAs, which had 3.75 Gbit/s transceivers for power- and cost-sensitive applications.
In April 2010, Altera introduced the FPGA industry's second 28-nm device, the Stratix V FPGA (to Xilinx's Kintex-7 FPGA), available with transceivers at speeds up to 28 Gbit/s. This device family has more than 1 million logic elements, up to 53 Mb of embedded memory, up to 7 x72 DDR3 DIMMs at 800 MHz, 1.6 Gbit/s LVDS performance, and up to 3,680 variable-precision DSP blocks.
Embedded HardCopy blocked harden standard or logic-intensive applications, increasing integration and delivering twice the density without a cost or power penalty. Altera developed a user-friendly method for partial reconfiguration, so core functionality can be changed easily and on the fly. There is a path to HardCopy V ASICs, when designs are ready for volume production. Altera’s 28 nm FPGAs aimed to reduce power requirements to 200 mW per channel. In 2004, the company began collaborating with Synopsys on HardCopy Structured ASICs.
In December 2012, the company announced the shipment of its first 28 nm Cyclone V SoC devices, which had a dual-core ARM architecture Cortex-A9 processor system with FPGA logic on a single chip. These SoCs were targeted for wireless communications, industrial, video surveillance, automotive and medical equipment markets. With these SoCs devices, users were able to create custom field-programmable SoC variants for power, board space, performance and cost optimization.
In February 2013, Altera announced an agreement with Intel to use Intel’s foundry services to produce its 14-nm node for the future manufacturing of its FPGAs, based on Intel’s 14 nm tri-gate transistor technology, in place of Altera’s ongoing agreement with TSMC.
In October 2016, nearly one year after Intel's integration with Altera, STRATIX 10 was announced, which is based on Intel's 14 nm Tri-Gate process.
Restatement of financial results
On June 21, 2006, after an investigation by the U.S. Securities and Exchange Commission, the company restated its financial results from 1996 to 2005 to correct accounting errors related to options backdating. The chief financial officer of the company resigned. Altera filed a petition to overturn related regulations but was denied in 2020.
Acquisition by Intel
- "Altera Corporation 2014 Form 10-K Annual Report". U.S. Securities and Exchange Commission.
- "Arria 10 Device Overview" (PDF). Intel. September 4, 2013.
- Maxfield, Clive (May 9, 2011). "Altera's Quartus II design software features Qsys System Integration Tool". EETimes.
- Maxfield, Clive (November 7, 2011). "Latest and greatest Quartus II design software from Altera". EETimes.
- "MERCHANT IC VENDORS" (PDF). Smithsonian Institution.
- Pitcher, Graham (June 10, 2013). "Altera set to bring 'big performance boosts' to fpga users". New Electronics.
- "Altera Buys System Design Firm". EE Times. September 12, 2000.
- Maxfield, Clive (May 6, 2013). "Altera opens the FPGA world to software programmers". EE Times.
- Maxfield, Clive (December 12, 2012). "Altera's shipping its first SoC FPGAs". EE Times.
- Clarke, Peter (December 15, 2012). "Altera eyes FDSOI process for FPGAs". EE Times.
- Clarke, Peter (May 14, 2013). "Altera to buy Enpirion for on-chip power conversion". EE Times.
- Maxfield, Clive (November 13, 2007). "Altera's Nios II FPGA soft processor core now available for standard cell ASIC designs". EE Times.
- "Altera Acquires Designpro". EE Times. May 2, 2000.
- LaPedus, Mark (May 19, 2008). "Analyst comments on Altera's 40-nm FPGAs". EE Times.
- "Altera Announces Stratix IV GT and Arria II GX FPGAs: Expands Industry's Broadest Integrated Transceiver Portfolio" (Press release). Business Wire. February 2, 2009.
- "Altera ships Stratix V GT FPGAs". EE Times. August 24, 2011.
- "Altera Shipping Industry's Fastest Backplane-capable Transceivers in 28-nm Stratix V FPGAs" (Press release). Business Wire. July 31, 2012.
- "Altera Collaborates with Synopsys on HardCopy Structured ASICs" (Press release). Design Reuse. June 8, 2004.
- McConnel, Toni (December 12, 2012). "Altera ships its first Cyclone V SoC devices". Embedded.
- "Altera and ARM Announce Industry's First FPGA-Adaptive Embedded Software Toolkit" (Press release). Arm Holdings. December 12, 2012.
- "Altera to Build Next-Generation, High-Performance FPGAs on Intel's 14 nm Tri-Gate Technology" (Press release). Intel. February 25, 2013.
- Hruska, Joel (October 10, 2016). "Intel launches Stratix 10: Altera FPGA combined with ARM CPU, 14nm manufacturing". ExtremeTech.
- "Altera Announces Expected Restatement Related to Stock-Based Compensation" (Press release). Business Wire. June 21, 2006.
- McGrath, Dylan (June 21, 2006). "Altera to restate 10 years of earnings". EE Times.
- Taub, Stephen (June 22, 2006). "Altera to Restate 10 Years of Financials". CFO.
- "US Supreme Court declines to hear Altera case". Ernst & Young. June 22, 2020.
- Clark, Don (December 28, 2015). "Intel Completes Acquisition of Altera". The Wall Street Journal.
- Burt, Jeffrey (December 28, 2015). "Intel Completes $16.7 Billion Altera Deal". eWeek.